Halide 22.0.0 Halide compiler and libraries

mini_cuda.h
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1#ifndef HALIDE_MINI_CUDA_H
2#define HALIDE_MINI_CUDA_H
3
4 namespace Halide {
5 namespace Runtime {
6 namespace Internal {
7 namespace Cuda {
8
9#if defined(WINDOWS) && defined(BITS_32)
10#define CUDAAPI __stdcall
11#else
12#define CUDAAPI
13#endif
14
15#ifdef BITS_64
16 typedef unsigned long long CUdeviceptr;
17#else
18 typedef unsigned int CUdeviceptr;
19#endif
20
21 typedef int CUdevice; /**< CUDA device */
22 typedef struct CUctx_st *CUcontext; /**< CUDA context */
23 typedef struct CUmod_st *CUmodule; /**< CUDA module */
24 typedef struct CUfunc_st *CUfunction; /**< CUDA function */
25 typedef struct CUstream_st *CUstream; /**< CUDA stream */
26 typedef struct CUevent_st *CUevent; /**< CUDA event */
27 typedef struct CUarray_st *CUarray;
28
29 typedef enum CUjit_option_enum {
30 CU_JIT_MAX_REGISTERS = 0,
31 CU_JIT_THREADS_PER_BLOCK = 1,
32 CU_JIT_WALL_TIME = 2,
33 CU_JIT_INFO_LOG_BUFFER = 3,
34 CU_JIT_INFO_LOG_BUFFER_SIZE_BYTES = 4,
35 CU_JIT_ERROR_LOG_BUFFER = 5,
36 CU_JIT_ERROR_LOG_BUFFER_SIZE_BYTES = 6,
37 CU_JIT_OPTIMIZATION_LEVEL = 7,
38 CU_JIT_TARGET_FROM_CUCONTEXT = 8,
39 CU_JIT_TARGET = 9,
40 CU_JIT_FALLBACK_STRATEGY = 10
41} CUjit_option;
42
43 typedef enum {
44 CUDA_SUCCESS = 0,
45 CUDA_ERROR_INVALID_VALUE = 1,
46 CUDA_ERROR_OUT_OF_MEMORY = 2,
47 CUDA_ERROR_NOT_INITIALIZED = 3,
48 CUDA_ERROR_DEINITIALIZED = 4,
49 CUDA_ERROR_PROFILER_DISABLED = 5,
50 CUDA_ERROR_PROFILER_NOT_INITIALIZED = 6,
51 CUDA_ERROR_PROFILER_ALREADY_STARTED = 7,
52 CUDA_ERROR_PROFILER_ALREADY_STOPPED = 8,
53 CUDA_ERROR_NO_DEVICE = 100,
54 CUDA_ERROR_INVALID_DEVICE = 101,
55 CUDA_ERROR_INVALID_IMAGE = 200,
56 CUDA_ERROR_INVALID_CONTEXT = 201,
57 CUDA_ERROR_CONTEXT_ALREADY_CURRENT = 202,
58 CUDA_ERROR_MAP_FAILED = 205,
59 CUDA_ERROR_UNMAP_FAILED = 206,
60 CUDA_ERROR_ARRAY_IS_MAPPED = 207,
61 CUDA_ERROR_ALREADY_MAPPED = 208,
62 CUDA_ERROR_NO_BINARY_FOR_GPU = 209,
63 CUDA_ERROR_ALREADY_ACQUIRED = 210,
64 CUDA_ERROR_NOT_MAPPED = 211,
65 CUDA_ERROR_NOT_MAPPED_AS_ARRAY = 212,
66 CUDA_ERROR_NOT_MAPPED_AS_POINTER = 213,
67 CUDA_ERROR_ECC_UNCORRECTABLE = 214,
68 CUDA_ERROR_UNSUPPORTED_LIMIT = 215,
69 CUDA_ERROR_CONTEXT_ALREADY_IN_USE = 216,
70 CUDA_ERROR_PEER_ACCESS_UNSUPPORTED = 217,
71 CUDA_ERROR_INVALID_PTX = 218,
72 CUDA_ERROR_INVALID_GRAPHICS_CONTEXT = 219,
73 CUDA_ERROR_NVLINK_UNCORRECTABLE = 220,
74 CUDA_ERROR_JIT_COMPILER_NOT_FOUND = 221,
75 CUDA_ERROR_INVALID_SOURCE = 300,
76 CUDA_ERROR_FILE_NOT_FOUND = 301,
77 CUDA_ERROR_SHARED_OBJECT_SYMBOL_NOT_FOUND = 302,
78 CUDA_ERROR_SHARED_OBJECT_INIT_FAILED = 303,
79 CUDA_ERROR_OPERATING_SYSTEM = 304,
80 CUDA_ERROR_INVALID_HANDLE = 400,
81 CUDA_ERROR_NOT_FOUND = 500,
82 CUDA_ERROR_NOT_READY = 600,
83 CUDA_ERROR_ILLEGAL_ADDRESS = 700,
84 CUDA_ERROR_LAUNCH_OUT_OF_RESOURCES = 701,
85 CUDA_ERROR_LAUNCH_TIMEOUT = 702,
86 CUDA_ERROR_LAUNCH_INCOMPATIBLE_TEXTURING = 703,
87 CUDA_ERROR_PEER_ACCESS_ALREADY_ENABLED = 704,
88 CUDA_ERROR_PEER_ACCESS_NOT_ENABLED = 705,
89 CUDA_ERROR_PRIMARY_CONTEXT_ACTIVE = 708,
90 CUDA_ERROR_CONTEXT_IS_DESTROYED = 709,
91 CUDA_ERROR_ILLEGAL_INSTRUCTION = 715,
92 CUDA_ERROR_MISALIGNED_ADDRESS = 716,
93 CUDA_ERROR_INVALID_ADDRESS_SPACE = 717,
94 CUDA_ERROR_INVALID_PC = 718,
95 CUDA_ERROR_LAUNCH_FAILED = 719,
96 CUDA_ERROR_NOT_PERMITTED = 800,
97 CUDA_ERROR_NOT_SUPPORTED = 801,
98 CUDA_ERROR_UNKNOWN = 999
99} CUresult;
100
101 typedef enum {
102 CU_DEVICE_ATTRIBUTE_MAX_THREADS_PER_BLOCK = 1, /**< Maximum number of threads per block */
103 CU_DEVICE_ATTRIBUTE_MAX_BLOCK_DIM_X = 2, /**< Maximum block dimension X */
104 CU_DEVICE_ATTRIBUTE_MAX_BLOCK_DIM_Y = 3, /**< Maximum block dimension Y */
105 CU_DEVICE_ATTRIBUTE_MAX_BLOCK_DIM_Z = 4, /**< Maximum block dimension Z */
106 CU_DEVICE_ATTRIBUTE_MAX_GRID_DIM_X = 5, /**< Maximum grid dimension X */
107 CU_DEVICE_ATTRIBUTE_MAX_GRID_DIM_Y = 6, /**< Maximum grid dimension Y */
108 CU_DEVICE_ATTRIBUTE_MAX_GRID_DIM_Z = 7, /**< Maximum grid dimension Z */
109 CU_DEVICE_ATTRIBUTE_MAX_SHARED_MEMORY_PER_BLOCK = 8, /**< Maximum shared memory available per block in bytes */
110 CU_DEVICE_ATTRIBUTE_SHARED_MEMORY_PER_BLOCK = 8, /**< Deprecated, use CU_DEVICE_ATTRIBUTE_MAX_SHARED_MEMORY_PER_BLOCK */
111 CU_DEVICE_ATTRIBUTE_TOTAL_CONSTANT_MEMORY = 9, /**< Memory available on device for __constant__ variables in a CUDA C kernel in bytes */
112 CU_DEVICE_ATTRIBUTE_WARP_SIZE = 10, /**< Warp size in threads */
113 CU_DEVICE_ATTRIBUTE_MAX_PITCH = 11, /**< Maximum pitch in bytes allowed by memory copies */
114 CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_BLOCK = 12, /**< Maximum number of 32-bit registers available per block */
115 CU_DEVICE_ATTRIBUTE_REGISTERS_PER_BLOCK = 12, /**< Deprecated, use CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_BLOCK */
116 CU_DEVICE_ATTRIBUTE_CLOCK_RATE = 13, /**< Typical clock frequency in kilohertz */
117 CU_DEVICE_ATTRIBUTE_TEXTURE_ALIGNMENT = 14, /**< Alignment requirement for textures */
118 CU_DEVICE_ATTRIBUTE_GPU_OVERLAP = 15, /**< Device can possibly copy memory and execute a kernel concurrently. Deprecated. Use instead CU_DEVICE_ATTRIBUTE_ASYNC_ENGINE_COUNT. */
119 CU_DEVICE_ATTRIBUTE_MULTIPROCESSOR_COUNT = 16, /**< Number of multiprocessors on device */
120 CU_DEVICE_ATTRIBUTE_KERNEL_EXEC_TIMEOUT = 17, /**< Specifies whether there is a run time limit on kernels */
121 CU_DEVICE_ATTRIBUTE_INTEGRATED = 18, /**< Device is integrated with host memory */
122 CU_DEVICE_ATTRIBUTE_CAN_MAP_HOST_MEMORY = 19, /**< Device can map host memory into CUDA address space */
123 CU_DEVICE_ATTRIBUTE_COMPUTE_MODE = 20, /**< Compute mode (See CUcomputemode for details) */
124 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE1D_WIDTH = 21, /**< Maximum 1D texture width */
125 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_WIDTH = 22, /**< Maximum 2D texture width */
126 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_HEIGHT = 23, /**< Maximum 2D texture height */
127 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_WIDTH = 24, /**< Maximum 3D texture width */
128 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_HEIGHT = 25, /**< Maximum 3D texture height */
129 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_DEPTH = 26, /**< Maximum 3D texture depth */
130 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LAYERED_WIDTH = 27, /**< Maximum 2D layered texture width */
131 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LAYERED_HEIGHT = 28, /**< Maximum 2D layered texture height */
132 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LAYERED_LAYERS = 29, /**< Maximum layers in a 2D layered texture */
133 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_ARRAY_WIDTH = 27, /**< Deprecated, use CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LAYERED_WIDTH */
134 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_ARRAY_HEIGHT = 28, /**< Deprecated, use CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LAYERED_HEIGHT */
135 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_ARRAY_NUMSLICES = 29, /**< Deprecated, use CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LAYERED_LAYERS */
136 CU_DEVICE_ATTRIBUTE_SURFACE_ALIGNMENT = 30, /**< Alignment requirement for surfaces */
137 CU_DEVICE_ATTRIBUTE_CONCURRENT_KERNELS = 31, /**< Device can possibly execute multiple kernels concurrently */
138 CU_DEVICE_ATTRIBUTE_ECC_ENABLED = 32, /**< Device has ECC support enabled */
139 CU_DEVICE_ATTRIBUTE_PCI_BUS_ID = 33, /**< PCI bus ID of the device */
140 CU_DEVICE_ATTRIBUTE_PCI_DEVICE_ID = 34, /**< PCI device ID of the device */
141 CU_DEVICE_ATTRIBUTE_TCC_DRIVER = 35, /**< Device is using TCC driver model */
142 CU_DEVICE_ATTRIBUTE_MEMORY_CLOCK_RATE = 36, /**< Peak memory clock frequency in kilohertz */
143 CU_DEVICE_ATTRIBUTE_GLOBAL_MEMORY_BUS_WIDTH = 37, /**< Global memory bus width in bits */
144 CU_DEVICE_ATTRIBUTE_L2_CACHE_SIZE = 38, /**< Size of L2 cache in bytes */
145 CU_DEVICE_ATTRIBUTE_MAX_THREADS_PER_MULTIPROCESSOR = 39, /**< Maximum resident threads per multiprocessor */
146 CU_DEVICE_ATTRIBUTE_ASYNC_ENGINE_COUNT = 40, /**< Number of asynchronous engines */
147 CU_DEVICE_ATTRIBUTE_UNIFIED_ADDRESSING = 41, /**< Device shares a unified address space with the host */
148 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE1D_LAYERED_WIDTH = 42, /**< Maximum 1D layered texture width */
149 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE1D_LAYERED_LAYERS = 43, /**< Maximum layers in a 1D layered texture */
150 CU_DEVICE_ATTRIBUTE_CAN_TEX2D_GATHER = 44, /**< Deprecated, do not use. */
151 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_GATHER_WIDTH = 45, /**< Maximum 2D texture width if CUDA_ARRAY3D_TEXTURE_GATHER is set */
152 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_GATHER_HEIGHT = 46, /**< Maximum 2D texture height if CUDA_ARRAY3D_TEXTURE_GATHER is set */
153 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_WIDTH_ALTERNATE = 47, /**< Alternate maximum 3D texture width */
154 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_HEIGHT_ALTERNATE = 48, /**< Alternate maximum 3D texture height */
155 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_DEPTH_ALTERNATE = 49, /**< Alternate maximum 3D texture depth */
156 CU_DEVICE_ATTRIBUTE_PCI_DOMAIN_ID = 50, /**< PCI domain ID of the device */
157 CU_DEVICE_ATTRIBUTE_TEXTURE_PITCH_ALIGNMENT = 51, /**< Pitch alignment requirement for textures */
158 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURECUBEMAP_WIDTH = 52, /**< Maximum cubemap texture width/height */
159 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURECUBEMAP_LAYERED_WIDTH = 53, /**< Maximum cubemap layered texture width/height */
160 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURECUBEMAP_LAYERED_LAYERS = 54, /**< Maximum layers in a cubemap layered texture */
161 CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE1D_WIDTH = 55, /**< Maximum 1D surface width */
162 CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE2D_WIDTH = 56, /**< Maximum 2D surface width */
163 CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE2D_HEIGHT = 57, /**< Maximum 2D surface height */
164 CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE3D_WIDTH = 58, /**< Maximum 3D surface width */
165 CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE3D_HEIGHT = 59, /**< Maximum 3D surface height */
166 CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE3D_DEPTH = 60, /**< Maximum 3D surface depth */
167 CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE1D_LAYERED_WIDTH = 61, /**< Maximum 1D layered surface width */
168 CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE1D_LAYERED_LAYERS = 62, /**< Maximum layers in a 1D layered surface */
169 CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE2D_LAYERED_WIDTH = 63, /**< Maximum 2D layered surface width */
170 CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE2D_LAYERED_HEIGHT = 64, /**< Maximum 2D layered surface height */
171 CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE2D_LAYERED_LAYERS = 65, /**< Maximum layers in a 2D layered surface */
172 CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACECUBEMAP_WIDTH = 66, /**< Maximum cubemap surface width */
173 CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACECUBEMAP_LAYERED_WIDTH = 67, /**< Maximum cubemap layered surface width */
174 CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACECUBEMAP_LAYERED_LAYERS = 68, /**< Maximum layers in a cubemap layered surface */
175 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE1D_LINEAR_WIDTH = 69, /**< Maximum 1D linear texture width */
176 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LINEAR_WIDTH = 70, /**< Maximum 2D linear texture width */
177 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LINEAR_HEIGHT = 71, /**< Maximum 2D linear texture height */
178 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LINEAR_PITCH = 72, /**< Maximum 2D linear texture pitch in bytes */
179 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_MIPMAPPED_WIDTH = 73, /**< Maximum mipmapped 2D texture width */
180 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_MIPMAPPED_HEIGHT = 74, /**< Maximum mipmapped 2D texture height */
181 CU_DEVICE_ATTRIBUTE_COMPUTE_CAPABILITY_MAJOR = 75, /**< Major compute capability version number */
182 CU_DEVICE_ATTRIBUTE_COMPUTE_CAPABILITY_MINOR = 76, /**< Minor compute capability version number */
183 CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE1D_MIPMAPPED_WIDTH = 77, /**< Maximum mipmapped 1D texture width */
184 CU_DEVICE_ATTRIBUTE_STREAM_PRIORITIES_SUPPORTED = 78, /**< Device supports stream priorities */
185 CU_DEVICE_ATTRIBUTE_GLOBAL_L1_CACHE_SUPPORTED = 79, /**< Device supports caching globals in L1 */
186 CU_DEVICE_ATTRIBUTE_LOCAL_L1_CACHE_SUPPORTED = 80, /**< Device supports caching locals in L1 */
187 CU_DEVICE_ATTRIBUTE_MAX_SHARED_MEMORY_PER_MULTIPROCESSOR = 81, /**< Maximum shared memory available per multiprocessor in bytes */
188 CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_MULTIPROCESSOR = 82, /**< Maximum number of 32-bit registers available per multiprocessor */
189 CU_DEVICE_ATTRIBUTE_MANAGED_MEMORY = 83, /**< Device can allocate managed memory on this system */
190 CU_DEVICE_ATTRIBUTE_MULTI_GPU_BOARD = 84, /**< Device is on a multi-GPU board */
191 CU_DEVICE_ATTRIBUTE_MULTI_GPU_BOARD_GROUP_ID = 85, /**< Unique id for a group of devices on the same multi-GPU board */
192 CU_DEVICE_ATTRIBUTE_MAX
193} CUdevice_attribute;
194
195 typedef enum CUmemorytype_enum {
196 CU_MEMORYTYPE_HOST = 0x01,
197 CU_MEMORYTYPE_DEVICE = 0x02,
198 CU_MEMORYTYPE_ARRAY = 0x03,
199 CU_MEMORYTYPE_UNIFIED = 0x04
200} CUmemorytype;
201
202 typedef struct CUDA_MEMCPY3D_st {
203 size_t srcXInBytes; /**< Source X in bytes */
204 size_t srcY; /**< Source Y */
205 size_t srcZ; /**< Source Z */
206 size_t srcLOD; /**< Source LOD */
207 CUmemorytype srcMemoryType; /**< Source memory type (host, device, array) */
208 const void *srcHost; /**< Source host pointer */
209 CUdeviceptr srcDevice; /**< Source device pointer */
210 CUarray srcArray; /**< Source array reference */
211 void *reserved0; /**< Must be NULL */
212 size_t srcPitch; /**< Source pitch (ignored when src is array) */
213 size_t srcHeight; /**< Source height (ignored when src is array; may be 0 if Depth==1) */
214
215 size_t dstXInBytes; /**< Destination X in bytes */
216 size_t dstY; /**< Destination Y */
217 size_t dstZ; /**< Destination Z */
218 size_t dstLOD; /**< Destination LOD */
219 CUmemorytype dstMemoryType; /**< Destination memory type (host, device, array) */
220 void *dstHost; /**< Destination host pointer */
221 CUdeviceptr dstDevice; /**< Destination device pointer */
222 CUarray dstArray; /**< Destination array reference */
223 void *reserved1; /**< Must be NULL */
224 size_t dstPitch; /**< Destination pitch (ignored when dst is array) */
225 size_t dstHeight; /**< Destination height (ignored when dst is array; may be 0 if Depth==1) */
226
227 size_t WidthInBytes; /**< Width of 3D memory copy in bytes */
228 size_t Height; /**< Height of 3D memory copy */
229 size_t Depth; /**< Depth of 3D memory copy */
230} CUDA_MEMCPY3D;
231
232#define CU_POINTER_ATTRIBUTE_CONTEXT 1
233
234} // namespace Cuda
235} // namespace Internal
236} // namespace Runtime
237} // namespace Halide
238
239#endif
Halide::Runtime::Internal::Cuda::CUarray
struct CUarray_st * CUarray
Definition: mini_cuda.h:27
Halide::Runtime::Internal::Cuda::CUevent
struct CUevent_st * CUevent
CUDA event.
Definition: mini_cuda.h:26
Halide::Runtime::Internal::Cuda::CUmodule
struct CUmod_st * CUmodule
CUDA module.
Definition: mini_cuda.h:23
Halide::Runtime::Internal::Cuda::CUresult
CUresult
Definition: mini_cuda.h:43
Halide::Runtime::Internal::Cuda::CUDA_ERROR_OPERATING_SYSTEM
@ CUDA_ERROR_OPERATING_SYSTEM
Definition: mini_cuda.h:79
Halide::Runtime::Internal::Cuda::CUDA_ERROR_OUT_OF_MEMORY
@ CUDA_ERROR_OUT_OF_MEMORY
Definition: mini_cuda.h:46
Halide::Runtime::Internal::Cuda::CUDA_ERROR_PEER_ACCESS_UNSUPPORTED
@ CUDA_ERROR_PEER_ACCESS_UNSUPPORTED
Definition: mini_cuda.h:70
Halide::Runtime::Internal::Cuda::CUDA_ERROR_PROFILER_ALREADY_STARTED
@ CUDA_ERROR_PROFILER_ALREADY_STARTED
Definition: mini_cuda.h:51
Halide::Runtime::Internal::Cuda::CUDA_ERROR_ALREADY_ACQUIRED
@ CUDA_ERROR_ALREADY_ACQUIRED
Definition: mini_cuda.h:63
Halide::Runtime::Internal::Cuda::CUDA_ERROR_INVALID_HANDLE
@ CUDA_ERROR_INVALID_HANDLE
Definition: mini_cuda.h:80
Halide::Runtime::Internal::Cuda::CUDA_ERROR_PROFILER_DISABLED
@ CUDA_ERROR_PROFILER_DISABLED
Definition: mini_cuda.h:49
Halide::Runtime::Internal::Cuda::CUDA_ERROR_LAUNCH_OUT_OF_RESOURCES
@ CUDA_ERROR_LAUNCH_OUT_OF_RESOURCES
Definition: mini_cuda.h:84
Halide::Runtime::Internal::Cuda::CUDA_ERROR_INVALID_PC
@ CUDA_ERROR_INVALID_PC
Definition: mini_cuda.h:94
Halide::Runtime::Internal::Cuda::CUDA_ERROR_LAUNCH_TIMEOUT
@ CUDA_ERROR_LAUNCH_TIMEOUT
Definition: mini_cuda.h:85
Halide::Runtime::Internal::Cuda::CUDA_ERROR_NO_BINARY_FOR_GPU
@ CUDA_ERROR_NO_BINARY_FOR_GPU
Definition: mini_cuda.h:62
Halide::Runtime::Internal::Cuda::CUDA_ERROR_CONTEXT_ALREADY_IN_USE
@ CUDA_ERROR_CONTEXT_ALREADY_IN_USE
Definition: mini_cuda.h:69
Halide::Runtime::Internal::Cuda::CUDA_ERROR_ARRAY_IS_MAPPED
@ CUDA_ERROR_ARRAY_IS_MAPPED
Definition: mini_cuda.h:60
Halide::Runtime::Internal::Cuda::CUDA_ERROR_ILLEGAL_ADDRESS
@ CUDA_ERROR_ILLEGAL_ADDRESS
Definition: mini_cuda.h:83
Halide::Runtime::Internal::Cuda::CUDA_ERROR_PEER_ACCESS_NOT_ENABLED
@ CUDA_ERROR_PEER_ACCESS_NOT_ENABLED
Definition: mini_cuda.h:88
Halide::Runtime::Internal::Cuda::CUDA_ERROR_NOT_MAPPED
@ CUDA_ERROR_NOT_MAPPED
Definition: mini_cuda.h:64
Halide::Runtime::Internal::Cuda::CUDA_ERROR_MISALIGNED_ADDRESS
@ CUDA_ERROR_MISALIGNED_ADDRESS
Definition: mini_cuda.h:92
Halide::Runtime::Internal::Cuda::CUDA_ERROR_SHARED_OBJECT_INIT_FAILED
@ CUDA_ERROR_SHARED_OBJECT_INIT_FAILED
Definition: mini_cuda.h:78
Halide::Runtime::Internal::Cuda::CUDA_ERROR_NOT_PERMITTED
@ CUDA_ERROR_NOT_PERMITTED
Definition: mini_cuda.h:96
Halide::Runtime::Internal::Cuda::CUDA_ERROR_PEER_ACCESS_ALREADY_ENABLED
@ CUDA_ERROR_PEER_ACCESS_ALREADY_ENABLED
Definition: mini_cuda.h:87
Halide::Runtime::Internal::Cuda::CUDA_ERROR_ILLEGAL_INSTRUCTION
@ CUDA_ERROR_ILLEGAL_INSTRUCTION
Definition: mini_cuda.h:91
Halide::Runtime::Internal::Cuda::CUDA_ERROR_NOT_MAPPED_AS_POINTER
@ CUDA_ERROR_NOT_MAPPED_AS_POINTER
Definition: mini_cuda.h:66
Halide::Runtime::Internal::Cuda::CUDA_ERROR_INVALID_DEVICE
@ CUDA_ERROR_INVALID_DEVICE
Definition: mini_cuda.h:54
Halide::Runtime::Internal::Cuda::CUDA_ERROR_FILE_NOT_FOUND
@ CUDA_ERROR_FILE_NOT_FOUND
Definition: mini_cuda.h:76
Halide::Runtime::Internal::Cuda::CUDA_ERROR_INVALID_GRAPHICS_CONTEXT
@ CUDA_ERROR_INVALID_GRAPHICS_CONTEXT
Definition: mini_cuda.h:72
Halide::Runtime::Internal::Cuda::CUDA_ERROR_UNSUPPORTED_LIMIT
@ CUDA_ERROR_UNSUPPORTED_LIMIT
Definition: mini_cuda.h:68
Halide::Runtime::Internal::Cuda::CUDA_ERROR_NOT_INITIALIZED
@ CUDA_ERROR_NOT_INITIALIZED
Definition: mini_cuda.h:47
Halide::Runtime::Internal::Cuda::CUDA_ERROR_INVALID_ADDRESS_SPACE
@ CUDA_ERROR_INVALID_ADDRESS_SPACE
Definition: mini_cuda.h:93
Halide::Runtime::Internal::Cuda::CUDA_ERROR_INVALID_CONTEXT
@ CUDA_ERROR_INVALID_CONTEXT
Definition: mini_cuda.h:56
Halide::Runtime::Internal::Cuda::CUDA_ERROR_PROFILER_NOT_INITIALIZED
@ CUDA_ERROR_PROFILER_NOT_INITIALIZED
Definition: mini_cuda.h:50
Halide::Runtime::Internal::Cuda::CUDA_ERROR_UNKNOWN
@ CUDA_ERROR_UNKNOWN
Definition: mini_cuda.h:98
Halide::Runtime::Internal::Cuda::CUDA_ERROR_MAP_FAILED
@ CUDA_ERROR_MAP_FAILED
Definition: mini_cuda.h:58
Halide::Runtime::Internal::Cuda::CUDA_SUCCESS
@ CUDA_SUCCESS
Definition: mini_cuda.h:44
Halide::Runtime::Internal::Cuda::CUDA_ERROR_DEINITIALIZED
@ CUDA_ERROR_DEINITIALIZED
Definition: mini_cuda.h:48
Halide::Runtime::Internal::Cuda::CUDA_ERROR_NO_DEVICE
@ CUDA_ERROR_NO_DEVICE
Definition: mini_cuda.h:53
Halide::Runtime::Internal::Cuda::CUDA_ERROR_LAUNCH_FAILED
@ CUDA_ERROR_LAUNCH_FAILED
Definition: mini_cuda.h:95
Halide::Runtime::Internal::Cuda::CUDA_ERROR_CONTEXT_ALREADY_CURRENT
@ CUDA_ERROR_CONTEXT_ALREADY_CURRENT
Definition: mini_cuda.h:57
Halide::Runtime::Internal::Cuda::CUDA_ERROR_NOT_FOUND
@ CUDA_ERROR_NOT_FOUND
Definition: mini_cuda.h:81
Halide::Runtime::Internal::Cuda::CUDA_ERROR_UNMAP_FAILED
@ CUDA_ERROR_UNMAP_FAILED
Definition: mini_cuda.h:59
Halide::Runtime::Internal::Cuda::CUDA_ERROR_CONTEXT_IS_DESTROYED
@ CUDA_ERROR_CONTEXT_IS_DESTROYED
Definition: mini_cuda.h:90
Halide::Runtime::Internal::Cuda::CUDA_ERROR_ALREADY_MAPPED
@ CUDA_ERROR_ALREADY_MAPPED
Definition: mini_cuda.h:61
Halide::Runtime::Internal::Cuda::CUDA_ERROR_LAUNCH_INCOMPATIBLE_TEXTURING
@ CUDA_ERROR_LAUNCH_INCOMPATIBLE_TEXTURING
Definition: mini_cuda.h:86
Halide::Runtime::Internal::Cuda::CUDA_ERROR_ECC_UNCORRECTABLE
@ CUDA_ERROR_ECC_UNCORRECTABLE
Definition: mini_cuda.h:67
Halide::Runtime::Internal::Cuda::CUDA_ERROR_NOT_READY
@ CUDA_ERROR_NOT_READY
Definition: mini_cuda.h:82
Halide::Runtime::Internal::Cuda::CUDA_ERROR_INVALID_SOURCE
@ CUDA_ERROR_INVALID_SOURCE
Definition: mini_cuda.h:75
Halide::Runtime::Internal::Cuda::CUDA_ERROR_PROFILER_ALREADY_STOPPED
@ CUDA_ERROR_PROFILER_ALREADY_STOPPED
Definition: mini_cuda.h:52
Halide::Runtime::Internal::Cuda::CUDA_ERROR_INVALID_PTX
@ CUDA_ERROR_INVALID_PTX
Definition: mini_cuda.h:71
Halide::Runtime::Internal::Cuda::CUDA_ERROR_NOT_MAPPED_AS_ARRAY
@ CUDA_ERROR_NOT_MAPPED_AS_ARRAY
Definition: mini_cuda.h:65
Halide::Runtime::Internal::Cuda::CUDA_ERROR_JIT_COMPILER_NOT_FOUND
@ CUDA_ERROR_JIT_COMPILER_NOT_FOUND
Definition: mini_cuda.h:74
Halide::Runtime::Internal::Cuda::CUDA_ERROR_INVALID_IMAGE
@ CUDA_ERROR_INVALID_IMAGE
Definition: mini_cuda.h:55
Halide::Runtime::Internal::Cuda::CUDA_ERROR_SHARED_OBJECT_SYMBOL_NOT_FOUND
@ CUDA_ERROR_SHARED_OBJECT_SYMBOL_NOT_FOUND
Definition: mini_cuda.h:77
Halide::Runtime::Internal::Cuda::CUDA_ERROR_INVALID_VALUE
@ CUDA_ERROR_INVALID_VALUE
Definition: mini_cuda.h:45
Halide::Runtime::Internal::Cuda::CUDA_ERROR_PRIMARY_CONTEXT_ACTIVE
@ CUDA_ERROR_PRIMARY_CONTEXT_ACTIVE
Definition: mini_cuda.h:89
Halide::Runtime::Internal::Cuda::CUDA_ERROR_NVLINK_UNCORRECTABLE
@ CUDA_ERROR_NVLINK_UNCORRECTABLE
Definition: mini_cuda.h:73
Halide::Runtime::Internal::Cuda::CUDA_ERROR_NOT_SUPPORTED
@ CUDA_ERROR_NOT_SUPPORTED
Definition: mini_cuda.h:97
Halide::Runtime::Internal::Cuda::CUdeviceptr
unsigned int CUdeviceptr
Definition: mini_cuda.h:18
Halide::Runtime::Internal::Cuda::CUmemorytype
enum Halide::Runtime::Internal::Cuda::CUmemorytype_enum CUmemorytype
Halide::Runtime::Internal::Cuda::CUfunction
struct CUfunc_st * CUfunction
CUDA function.
Definition: mini_cuda.h:24
Halide::Runtime::Internal::Cuda::CUdevice
int CUdevice
CUDA device.
Definition: mini_cuda.h:21
Halide::Runtime::Internal::Cuda::CUstream
struct CUstream_st * CUstream
CUDA stream.
Definition: mini_cuda.h:25
Halide::Runtime::Internal::Cuda::CUmemorytype_enum
CUmemorytype_enum
Definition: mini_cuda.h:195
Halide::Runtime::Internal::Cuda::CU_MEMORYTYPE_HOST
@ CU_MEMORYTYPE_HOST
Definition: mini_cuda.h:196
Halide::Runtime::Internal::Cuda::CU_MEMORYTYPE_UNIFIED
@ CU_MEMORYTYPE_UNIFIED
Definition: mini_cuda.h:199
Halide::Runtime::Internal::Cuda::CU_MEMORYTYPE_ARRAY
@ CU_MEMORYTYPE_ARRAY
Definition: mini_cuda.h:198
Halide::Runtime::Internal::Cuda::CU_MEMORYTYPE_DEVICE
@ CU_MEMORYTYPE_DEVICE
Definition: mini_cuda.h:197
Halide::Runtime::Internal::Cuda::CUjit_option_enum
CUjit_option_enum
Definition: mini_cuda.h:29
Halide::Runtime::Internal::Cuda::CU_JIT_MAX_REGISTERS
@ CU_JIT_MAX_REGISTERS
Definition: mini_cuda.h:30
Halide::Runtime::Internal::Cuda::CU_JIT_ERROR_LOG_BUFFER_SIZE_BYTES
@ CU_JIT_ERROR_LOG_BUFFER_SIZE_BYTES
Definition: mini_cuda.h:36
Halide::Runtime::Internal::Cuda::CU_JIT_ERROR_LOG_BUFFER
@ CU_JIT_ERROR_LOG_BUFFER
Definition: mini_cuda.h:35
Halide::Runtime::Internal::Cuda::CU_JIT_TARGET
@ CU_JIT_TARGET
Definition: mini_cuda.h:39
Halide::Runtime::Internal::Cuda::CU_JIT_THREADS_PER_BLOCK
@ CU_JIT_THREADS_PER_BLOCK
Definition: mini_cuda.h:31
Halide::Runtime::Internal::Cuda::CU_JIT_INFO_LOG_BUFFER_SIZE_BYTES
@ CU_JIT_INFO_LOG_BUFFER_SIZE_BYTES
Definition: mini_cuda.h:34
Halide::Runtime::Internal::Cuda::CU_JIT_TARGET_FROM_CUCONTEXT
@ CU_JIT_TARGET_FROM_CUCONTEXT
Definition: mini_cuda.h:38
Halide::Runtime::Internal::Cuda::CU_JIT_OPTIMIZATION_LEVEL
@ CU_JIT_OPTIMIZATION_LEVEL
Definition: mini_cuda.h:37
Halide::Runtime::Internal::Cuda::CU_JIT_FALLBACK_STRATEGY
@ CU_JIT_FALLBACK_STRATEGY
Definition: mini_cuda.h:40
Halide::Runtime::Internal::Cuda::CU_JIT_INFO_LOG_BUFFER
@ CU_JIT_INFO_LOG_BUFFER
Definition: mini_cuda.h:33
Halide::Runtime::Internal::Cuda::CU_JIT_WALL_TIME
@ CU_JIT_WALL_TIME
Definition: mini_cuda.h:32
Halide::Runtime::Internal::Cuda::CUcontext
struct CUctx_st * CUcontext
CUDA context.
Definition: mini_cuda.h:22
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D
struct Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st CUDA_MEMCPY3D
Halide::Runtime::Internal::Cuda::CUjit_option
enum Halide::Runtime::Internal::Cuda::CUjit_option_enum CUjit_option
Halide::Runtime::Internal::Cuda::CUdevice_attribute
CUdevice_attribute
Definition: mini_cuda.h:101
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LINEAR_WIDTH
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LINEAR_WIDTH
Maximum 2D linear texture width.
Definition: mini_cuda.h:176
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_ARRAY_HEIGHT
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_ARRAY_HEIGHT
Deprecated, use CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LAYERED_HEIGHT.
Definition: mini_cuda.h:134
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LINEAR_PITCH
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LINEAR_PITCH
Maximum 2D linear texture pitch in bytes.
Definition: mini_cuda.h:178
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAX_GRID_DIM_Y
@ CU_DEVICE_ATTRIBUTE_MAX_GRID_DIM_Y
Maximum grid dimension Y.
Definition: mini_cuda.h:107
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE1D_LINEAR_WIDTH
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE1D_LINEAR_WIDTH
Maximum 1D linear texture width.
Definition: mini_cuda.h:175
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_CONCURRENT_KERNELS
@ CU_DEVICE_ATTRIBUTE_CONCURRENT_KERNELS
Device can possibly execute multiple kernels concurrently.
Definition: mini_cuda.h:137
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE2D_WIDTH
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE2D_WIDTH
Maximum 2D surface width.
Definition: mini_cuda.h:162
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_HEIGHT
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_HEIGHT
Maximum 2D texture height.
Definition: mini_cuda.h:126
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MEMORY_CLOCK_RATE
@ CU_DEVICE_ATTRIBUTE_MEMORY_CLOCK_RATE
Peak memory clock frequency in kilohertz.
Definition: mini_cuda.h:142
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_CLOCK_RATE
@ CU_DEVICE_ATTRIBUTE_CLOCK_RATE
Typical clock frequency in kilohertz.
Definition: mini_cuda.h:116
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE1D_MIPMAPPED_WIDTH
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE1D_MIPMAPPED_WIDTH
Maximum mipmapped 1D texture width.
Definition: mini_cuda.h:183
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_MIPMAPPED_HEIGHT
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_MIPMAPPED_HEIGHT
Maximum mipmapped 2D texture height.
Definition: mini_cuda.h:180
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE1D_LAYERED_LAYERS
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE1D_LAYERED_LAYERS
Maximum layers in a 1D layered surface.
Definition: mini_cuda.h:168
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAX
@ CU_DEVICE_ATTRIBUTE_MAX
Definition: mini_cuda.h:192
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MANAGED_MEMORY
@ CU_DEVICE_ATTRIBUTE_MANAGED_MEMORY
Device can allocate managed memory on this system.
Definition: mini_cuda.h:189
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_COMPUTE_MODE
@ CU_DEVICE_ATTRIBUTE_COMPUTE_MODE
Compute mode (See CUcomputemode for details)
Definition: mini_cuda.h:123
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_PCI_DEVICE_ID
@ CU_DEVICE_ATTRIBUTE_PCI_DEVICE_ID
PCI device ID of the device.
Definition: mini_cuda.h:140
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_GATHER_WIDTH
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_GATHER_WIDTH
Maximum 2D texture width if CUDA_ARRAY3D_TEXTURE_GATHER is set.
Definition: mini_cuda.h:151
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_TEXTURE_ALIGNMENT
@ CU_DEVICE_ATTRIBUTE_TEXTURE_ALIGNMENT
Alignment requirement for textures.
Definition: mini_cuda.h:117
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MULTI_GPU_BOARD
@ CU_DEVICE_ATTRIBUTE_MULTI_GPU_BOARD
Device is on a multi-GPU board.
Definition: mini_cuda.h:190
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURECUBEMAP_LAYERED_LAYERS
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURECUBEMAP_LAYERED_LAYERS
Maximum layers in a cubemap layered texture.
Definition: mini_cuda.h:160
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LINEAR_HEIGHT
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LINEAR_HEIGHT
Maximum 2D linear texture height.
Definition: mini_cuda.h:177
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAX_BLOCK_DIM_X
@ CU_DEVICE_ATTRIBUTE_MAX_BLOCK_DIM_X
Maximum block dimension X.
Definition: mini_cuda.h:103
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAX_PITCH
@ CU_DEVICE_ATTRIBUTE_MAX_PITCH
Maximum pitch in bytes allowed by memory copies.
Definition: mini_cuda.h:113
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_ASYNC_ENGINE_COUNT
@ CU_DEVICE_ATTRIBUTE_ASYNC_ENGINE_COUNT
Number of asynchronous engines.
Definition: mini_cuda.h:146
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_SURFACE_ALIGNMENT
@ CU_DEVICE_ATTRIBUTE_SURFACE_ALIGNMENT
Alignment requirement for surfaces.
Definition: mini_cuda.h:136
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURECUBEMAP_LAYERED_WIDTH
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURECUBEMAP_LAYERED_WIDTH
Maximum cubemap layered texture width/height.
Definition: mini_cuda.h:159
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_TEXTURE_PITCH_ALIGNMENT
@ CU_DEVICE_ATTRIBUTE_TEXTURE_PITCH_ALIGNMENT
Pitch alignment requirement for textures.
Definition: mini_cuda.h:157
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_WIDTH
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_WIDTH
Maximum 2D texture width.
Definition: mini_cuda.h:125
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_UNIFIED_ADDRESSING
@ CU_DEVICE_ATTRIBUTE_UNIFIED_ADDRESSING
Device shares a unified address space with the host.
Definition: mini_cuda.h:147
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LAYERED_LAYERS
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LAYERED_LAYERS
Maximum layers in a 2D layered texture.
Definition: mini_cuda.h:132
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE2D_LAYERED_WIDTH
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE2D_LAYERED_WIDTH
Maximum 2D layered surface width.
Definition: mini_cuda.h:169
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_WIDTH
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_WIDTH
Maximum 3D texture width.
Definition: mini_cuda.h:127
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_GLOBAL_MEMORY_BUS_WIDTH
@ CU_DEVICE_ATTRIBUTE_GLOBAL_MEMORY_BUS_WIDTH
Global memory bus width in bits.
Definition: mini_cuda.h:143
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_COMPUTE_CAPABILITY_MINOR
@ CU_DEVICE_ATTRIBUTE_COMPUTE_CAPABILITY_MINOR
Minor compute capability version number.
Definition: mini_cuda.h:182
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_L2_CACHE_SIZE
@ CU_DEVICE_ATTRIBUTE_L2_CACHE_SIZE
Size of L2 cache in bytes.
Definition: mini_cuda.h:144
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_WARP_SIZE
@ CU_DEVICE_ATTRIBUTE_WARP_SIZE
Warp size in threads.
Definition: mini_cuda.h:112
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAX_SHARED_MEMORY_PER_MULTIPROCESSOR
@ CU_DEVICE_ATTRIBUTE_MAX_SHARED_MEMORY_PER_MULTIPROCESSOR
Maximum shared memory available per multiprocessor in bytes.
Definition: mini_cuda.h:187
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_REGISTERS_PER_BLOCK
@ CU_DEVICE_ATTRIBUTE_REGISTERS_PER_BLOCK
Deprecated, use CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_BLOCK.
Definition: mini_cuda.h:115
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAX_GRID_DIM_Z
@ CU_DEVICE_ATTRIBUTE_MAX_GRID_DIM_Z
Maximum grid dimension Z.
Definition: mini_cuda.h:108
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LAYERED_HEIGHT
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LAYERED_HEIGHT
Maximum 2D layered texture height.
Definition: mini_cuda.h:131
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAX_BLOCK_DIM_Z
@ CU_DEVICE_ATTRIBUTE_MAX_BLOCK_DIM_Z
Maximum block dimension Z.
Definition: mini_cuda.h:105
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE3D_DEPTH
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE3D_DEPTH
Maximum 3D surface depth.
Definition: mini_cuda.h:166
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_GPU_OVERLAP
@ CU_DEVICE_ATTRIBUTE_GPU_OVERLAP
Device can possibly copy memory and execute a kernel concurrently.
Definition: mini_cuda.h:118
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURECUBEMAP_WIDTH
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURECUBEMAP_WIDTH
Maximum cubemap texture width/height.
Definition: mini_cuda.h:158
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_ARRAY_NUMSLICES
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_ARRAY_NUMSLICES
Deprecated, use CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LAYERED_LAYERS.
Definition: mini_cuda.h:135
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACECUBEMAP_LAYERED_WIDTH
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACECUBEMAP_LAYERED_WIDTH
Maximum cubemap layered surface width.
Definition: mini_cuda.h:173
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_INTEGRATED
@ CU_DEVICE_ATTRIBUTE_INTEGRATED
Device is integrated with host memory.
Definition: mini_cuda.h:121
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE1D_WIDTH
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE1D_WIDTH
Maximum 1D surface width.
Definition: mini_cuda.h:161
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MULTI_GPU_BOARD_GROUP_ID
@ CU_DEVICE_ATTRIBUTE_MULTI_GPU_BOARD_GROUP_ID
Unique id for a group of devices on the same multi-GPU board.
Definition: mini_cuda.h:191
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_CAN_TEX2D_GATHER
@ CU_DEVICE_ATTRIBUTE_CAN_TEX2D_GATHER
Deprecated, do not use.
Definition: mini_cuda.h:150
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAX_SHARED_MEMORY_PER_BLOCK
@ CU_DEVICE_ATTRIBUTE_MAX_SHARED_MEMORY_PER_BLOCK
Maximum shared memory available per block in bytes.
Definition: mini_cuda.h:109
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACECUBEMAP_LAYERED_LAYERS
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACECUBEMAP_LAYERED_LAYERS
Maximum layers in a cubemap layered surface.
Definition: mini_cuda.h:174
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_ARRAY_WIDTH
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_ARRAY_WIDTH
Deprecated, use CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LAYERED_WIDTH.
Definition: mini_cuda.h:133
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE2D_LAYERED_HEIGHT
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE2D_LAYERED_HEIGHT
Maximum 2D layered surface height.
Definition: mini_cuda.h:170
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_MULTIPROCESSOR
@ CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_MULTIPROCESSOR
Maximum number of 32-bit registers available per multiprocessor.
Definition: mini_cuda.h:188
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_DEPTH
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_DEPTH
Maximum 3D texture depth.
Definition: mini_cuda.h:129
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_BLOCK
@ CU_DEVICE_ATTRIBUTE_MAX_REGISTERS_PER_BLOCK
Maximum number of 32-bit registers available per block.
Definition: mini_cuda.h:114
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_TCC_DRIVER
@ CU_DEVICE_ATTRIBUTE_TCC_DRIVER
Device is using TCC driver model.
Definition: mini_cuda.h:141
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE1D_LAYERED_WIDTH
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE1D_LAYERED_WIDTH
Maximum 1D layered texture width.
Definition: mini_cuda.h:148
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_GLOBAL_L1_CACHE_SUPPORTED
@ CU_DEVICE_ATTRIBUTE_GLOBAL_L1_CACHE_SUPPORTED
Device supports caching globals in L1.
Definition: mini_cuda.h:185
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAX_GRID_DIM_X
@ CU_DEVICE_ATTRIBUTE_MAX_GRID_DIM_X
Maximum grid dimension X.
Definition: mini_cuda.h:106
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_STREAM_PRIORITIES_SUPPORTED
@ CU_DEVICE_ATTRIBUTE_STREAM_PRIORITIES_SUPPORTED
Device supports stream priorities.
Definition: mini_cuda.h:184
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAX_THREADS_PER_BLOCK
@ CU_DEVICE_ATTRIBUTE_MAX_THREADS_PER_BLOCK
Maximum number of threads per block.
Definition: mini_cuda.h:102
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LAYERED_WIDTH
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_LAYERED_WIDTH
Maximum 2D layered texture width.
Definition: mini_cuda.h:130
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_COMPUTE_CAPABILITY_MAJOR
@ CU_DEVICE_ATTRIBUTE_COMPUTE_CAPABILITY_MAJOR
Major compute capability version number.
Definition: mini_cuda.h:181
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE1D_LAYERED_LAYERS
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE1D_LAYERED_LAYERS
Maximum layers in a 1D layered texture.
Definition: mini_cuda.h:149
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE1D_WIDTH
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE1D_WIDTH
Maximum 1D texture width.
Definition: mini_cuda.h:124
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_PCI_DOMAIN_ID
@ CU_DEVICE_ATTRIBUTE_PCI_DOMAIN_ID
PCI domain ID of the device.
Definition: mini_cuda.h:156
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_PCI_BUS_ID
@ CU_DEVICE_ATTRIBUTE_PCI_BUS_ID
PCI bus ID of the device.
Definition: mini_cuda.h:139
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAX_THREADS_PER_MULTIPROCESSOR
@ CU_DEVICE_ATTRIBUTE_MAX_THREADS_PER_MULTIPROCESSOR
Maximum resident threads per multiprocessor.
Definition: mini_cuda.h:145
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE1D_LAYERED_WIDTH
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE1D_LAYERED_WIDTH
Maximum 1D layered surface width.
Definition: mini_cuda.h:167
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_MIPMAPPED_WIDTH
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_MIPMAPPED_WIDTH
Maximum mipmapped 2D texture width.
Definition: mini_cuda.h:179
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_GATHER_HEIGHT
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE2D_GATHER_HEIGHT
Maximum 2D texture height if CUDA_ARRAY3D_TEXTURE_GATHER is set.
Definition: mini_cuda.h:152
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_HEIGHT
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_HEIGHT
Maximum 3D texture height.
Definition: mini_cuda.h:128
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE3D_HEIGHT
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE3D_HEIGHT
Maximum 3D surface height.
Definition: mini_cuda.h:165
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_LOCAL_L1_CACHE_SUPPORTED
@ CU_DEVICE_ATTRIBUTE_LOCAL_L1_CACHE_SUPPORTED
Device supports caching locals in L1.
Definition: mini_cuda.h:186
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE2D_HEIGHT
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE2D_HEIGHT
Maximum 2D surface height.
Definition: mini_cuda.h:163
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_ECC_ENABLED
@ CU_DEVICE_ATTRIBUTE_ECC_ENABLED
Device has ECC support enabled.
Definition: mini_cuda.h:138
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MULTIPROCESSOR_COUNT
@ CU_DEVICE_ATTRIBUTE_MULTIPROCESSOR_COUNT
Number of multiprocessors on device.
Definition: mini_cuda.h:119
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACECUBEMAP_WIDTH
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACECUBEMAP_WIDTH
Maximum cubemap surface width.
Definition: mini_cuda.h:172
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_HEIGHT_ALTERNATE
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_HEIGHT_ALTERNATE
Alternate maximum 3D texture height.
Definition: mini_cuda.h:154
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_SHARED_MEMORY_PER_BLOCK
@ CU_DEVICE_ATTRIBUTE_SHARED_MEMORY_PER_BLOCK
Deprecated, use CU_DEVICE_ATTRIBUTE_MAX_SHARED_MEMORY_PER_BLOCK.
Definition: mini_cuda.h:110
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE3D_WIDTH
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE3D_WIDTH
Maximum 3D surface width.
Definition: mini_cuda.h:164
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_WIDTH_ALTERNATE
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_WIDTH_ALTERNATE
Alternate maximum 3D texture width.
Definition: mini_cuda.h:153
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE2D_LAYERED_LAYERS
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_SURFACE2D_LAYERED_LAYERS
Maximum layers in a 2D layered surface.
Definition: mini_cuda.h:171
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_TOTAL_CONSTANT_MEMORY
@ CU_DEVICE_ATTRIBUTE_TOTAL_CONSTANT_MEMORY
Memory available on device for constant variables in a CUDA C kernel in bytes.
Definition: mini_cuda.h:111
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_DEPTH_ALTERNATE
@ CU_DEVICE_ATTRIBUTE_MAXIMUM_TEXTURE3D_DEPTH_ALTERNATE
Alternate maximum 3D texture depth.
Definition: mini_cuda.h:155
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_CAN_MAP_HOST_MEMORY
@ CU_DEVICE_ATTRIBUTE_CAN_MAP_HOST_MEMORY
Device can map host memory into CUDA address space.
Definition: mini_cuda.h:122
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_KERNEL_EXEC_TIMEOUT
@ CU_DEVICE_ATTRIBUTE_KERNEL_EXEC_TIMEOUT
Specifies whether there is a run time limit on kernels.
Definition: mini_cuda.h:120
Halide::Runtime::Internal::Cuda::CU_DEVICE_ATTRIBUTE_MAX_BLOCK_DIM_Y
@ CU_DEVICE_ATTRIBUTE_MAX_BLOCK_DIM_Y
Maximum block dimension Y.
Definition: mini_cuda.h:104
Halide
This file defines the class FunctionDAG, which is our representation of a Halide pipeline,...
Definition: AbstractGenerator.h:19
Halide::LinkageType::Internal
@ Internal
Not visible externally, similar to 'static' linkage in C.
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st
Definition: mini_cuda.h:202
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st::WidthInBytes
size_t WidthInBytes
Width of 3D memory copy in bytes.
Definition: mini_cuda.h:227
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st::srcMemoryType
CUmemorytype srcMemoryType
Source memory type (host, device, array)
Definition: mini_cuda.h:207
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st::Height
size_t Height
Height of 3D memory copy.
Definition: mini_cuda.h:228
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st::srcPitch
size_t srcPitch
Source pitch (ignored when src is array)
Definition: mini_cuda.h:212
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st::srcDevice
CUdeviceptr srcDevice
Source device pointer.
Definition: mini_cuda.h:209
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st::srcHost
const void * srcHost
Source host pointer.
Definition: mini_cuda.h:208
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st::dstArray
CUarray dstArray
Destination array reference.
Definition: mini_cuda.h:222
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st::srcHeight
size_t srcHeight
Source height (ignored when src is array; may be 0 if Depth==1)
Definition: mini_cuda.h:213
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st::srcLOD
size_t srcLOD
Source LOD.
Definition: mini_cuda.h:206
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st::dstDevice
CUdeviceptr dstDevice
Destination device pointer.
Definition: mini_cuda.h:221
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st::dstHeight
size_t dstHeight
Destination height (ignored when dst is array; may be 0 if Depth==1)
Definition: mini_cuda.h:225
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st::srcZ
size_t srcZ
Source Z.
Definition: mini_cuda.h:205
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st::dstMemoryType
CUmemorytype dstMemoryType
Destination memory type (host, device, array)
Definition: mini_cuda.h:219
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st::dstXInBytes
size_t dstXInBytes
Destination X in bytes.
Definition: mini_cuda.h:215
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st::dstHost
void * dstHost
Destination host pointer.
Definition: mini_cuda.h:220
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st::dstZ
size_t dstZ
Destination Z.
Definition: mini_cuda.h:217
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st::reserved0
void * reserved0
Must be NULL.
Definition: mini_cuda.h:211
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st::reserved1
void * reserved1
Must be NULL.
Definition: mini_cuda.h:223
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st::dstPitch
size_t dstPitch
Destination pitch (ignored when dst is array)
Definition: mini_cuda.h:224
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st::srcArray
CUarray srcArray
Source array reference.
Definition: mini_cuda.h:210
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st::Depth
size_t Depth
Depth of 3D memory copy.
Definition: mini_cuda.h:229
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st::dstY
size_t dstY
Destination Y.
Definition: mini_cuda.h:216
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st::srcXInBytes
size_t srcXInBytes
Source X in bytes.
Definition: mini_cuda.h:203
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st::dstLOD
size_t dstLOD
Destination LOD.
Definition: mini_cuda.h:218
Halide::Runtime::Internal::Cuda::CUDA_MEMCPY3D_st::srcY
size_t srcY
Source Y.
Definition: mini_cuda.h:204